Fundamental characteristics of on-chip micro solar cell (MSC) structures were investigated in this study. Several MSC structures\nusing different layers in three different CMOS processes were designed and fabricated. Effects of PN junction structure and\nprocess technology on solar cell performance were measured. Parameters for low-power and low-voltage implementation of power\nmanagement strategy and boost converter based circuits utilizing fractional voltage maximum power point tracking (FVMPPT)\nalgorithm were determined.The FVMPPT algorithm works based on the fraction between the maximum power point operation\nvoltage and the open circuit voltage of the solar cell structure. This ratio is typically between 0.72 and 0.78 for commercially available\npoly crystalline silicon solar cells that produce several watts of power under typical daylight illumination. Measurements showed\nthat the fractional voltage ratio is much higher and fairly constant between 0.82 and 0.85 for on-chip mono crystalline silicon micro\nsolar cell structures that produce microwatts of power.Mono crystalline silicon solar cell structures were observed to result in better\npower fill factor (PFF) that is higher than 74% indicating a higher energy harvesting efficiency.
Loading....